Zhuolun (Leon) HE

[zleonhe at gmail dot com] [CV] [Google Scholar]

I am a fourth-year Ph.D. candidate at the CSE department, Chinese University of Hong Kong, supervised by Prof. Bei Yu.

Research summary:

Publication

  1. Zhuolun He, and Bei Yu. “Heterogenous Acceleration for Design Rule Checking,” IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, CA, 2023. (Invited Paper)

  2. Zehua Pei, Fangzhou Liu, Zhuolun He, Guojin Chen, Haisheng Zheng, Keren Zhu, and Bei Yu. “AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search,” IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Francisco, CA, 2023.

  3. Zhuolun He, Haoyuan Wu, Xinyun Zhang, Xufeng Yao, Su Zheng, Haisheng Zheng, and Bei Yu. “ChatEDA: A Large Language Model Powered Autonomous Agent for EDA,” ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Snowbird, UT, 2023. [arXiv]

  4. Zehua Pei, Wenqian Zhao, Zhuolun He, and Bei Yu. “Bit-Level Quantization for Efficient Layout Hotspot Detection,” International Symposium of Electronics Design Automation (ISEDA), Nanjing, 2023. [Paper]

  5. Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, and Yuan Xie. “Efficient Super-Resolution System with Block-wise Hybridization and Quantized Winograd on FPGA,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.

  6. Zhuolun He, Yihang Zuo, Jiaxi Jiang, Haisheng Zheng, Yuzhe Ma, and Bei Yu. “OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration,” ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, 2023. [Paper] [Slides]

  7. Ziyi Wang, Zhuolun He, Chen Bai, Haoyu Yang, and Bei Yu. “Efficient Arithmetic Block Identification with Graph Learning and Network-flow,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.

  8. Wei Zhong, Zhenhua Feng, Zhuolun He, Weimin Wang, Yuzhe Ma, and Bei Yu. “Enabling Efficient Design Rule Checking with GPU Acceleration,” IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Antwerp, 2023. [Paper]

  9. Yuxuan Zhao, Qi Sun, Zhuolun He, Yang Bai, and Bei Yu. “AutoGraph: Optimizing DNN Computation Graph for Parallel GPU Kernel Execution,” AAAI Conference on Artificial Intelligence (AAAI), Washington, DC, 2023. [Paper] [Slides]

  10. Zhuolun He, Yuzhe Ma, and Bei Yu. “X-Check: GPU-Accelerated Design Rule Checking via Parallel Sweepline Algorithms,” IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, CA, 2022. [Paper] [Slides]

  11. Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Bei Yu, and Yu Huang. “Functionality Matters in Netlist Representation Learning,” ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, 2022. [Paper] [Slides]

  12. Zhuolun He, Ziyi Wang, Chen Bai, Haoyu Yang, and Bei Yu. “Graph Learning-Based Arithmetic Block Identification,” IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, 2021. [Paper] [Slides]

  13. Zhuolun He, Peiyu Liao, Siting Liu, Yuzhe Ma, and Bei Yu. “Physical Synthesis for Advanced Neural Network Processors,” IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Tokyo, 2021. (Invited Paper) [Paper] [Slides]

  14. Zhuolun He, Lu Zhang, Peiyu Liao, Yuzhe Ma, and Bei Yu. “Reinforcement Learning Driven Physical Synthesis,” IEEE International Conference on Solid -State and Integrated Circuit Technology (ICSICT), Kunming, 2020. (Invited Paper) [Paper]

  15. Rui Lin, Ching-Yun Ko, Zhuolun He, Cong Chen, Yuan Cheng, Hao Yu, Graziano Chesi, and Ngai Wong. “HOTCAKE: Higher Order Tucker Articulated Kernels for Deeper CNN Compression,” IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Kunming, 2020. (Invited Paper) [Paper]

  16. Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, and Martin D. F. Wong. “ Learn to Floorplan through Acquisition of Effective Local Search Heuristics,” IEEE International Conference on Computer Design (ICCD), Hartford, CT, 2020. [Paper] [Slides]

  17. Yuzhe Ma, Zhuolun He, Wei Li, Tinghuan Chen, Lu Zhang, and Bei Yu. “Understanding Graphs in EDA: From Shallow to Deep Learning,” ACM International Symposium on Physical Design (ISPD), Taipei, 2020. (Invited Paper) [Paper]

  18. Ching-Yun Ko, Cong Chen, Zhuolun He, Yuke Zhang, Kim Batselier, and Ngai Wong. “Deep Model Compression and Inference Speedup of Sum-Product Networks on Tensor Trains,” IEEE Transactions on Neural Networks and Learning Systems (TNNLS), 2019.

  19. Zhuolun He, Hanxian Huang, Ming Jiang, Yuanchao Bai, and Guojie Luo. “FPGA-based Real-time Super-resolution System for Ultra High Definition Videos,” IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), Boulder, CO, 2018. [Paper] [Slides]

  20. Zhuolun He and Guojie Luo. “FPGA Acceleration for Computational Glass-Free Displays,” ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, CA, 2017. [Paper] [Slides]

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